1. Field of the Invention
The present invention relates to a TFT array substrate and a method of manufacturing the same.
2. Description of Related Art
An electro-optic device such as a liquid crystal display attracts attention as one of flat panel displays to replace CRT. It has the features of low power consumption and thin profile and is widely applied to products having such features. An active matrix liquid crystal display often uses a TFT as a switching device.
In order to improve the productivity of such a liquid crystal display, it is necessary to reduce the number of manufacturing steps of a TFT array substrate having TFTs. For example, a manufacturing method that reduces the number of photolithography steps is disclosed in Japanese Unexamined Patent Application Publication No. 8-50308 (paragraphs 0084-0089, FIGS. 54 to 63). This technique allows the production of a TFT array substrate in five photolithography steps.
According to Japanese Unexamined Patent Application Publication No. 8-50308, the method first forms a source-drain electrode (SD) and a channel portion of a TFT as shown in FIGS. 58 and 59. This process first deposits a metal thin film such as Ti. Then, it patterns a resist by photolithography and performs wet etching using drug solution such as hydrofluoric acid and nitric acid. Then, the process etches a Ti film and an ohmic contact (n+a-Si) film in a semiconductor layer below the Ti film to thereby form the SD and the channel portion. The method then deposits a passivation film by plasma CVD or the like as shown in FIGS. 60 to 63. Then, it creates a contact hole to the drain electrode. After that, the method forms a transparent pixel electrode made of ITO, which is electrically connected with the drain electrode through the contact hole.
The inventors of the present invention have now discovered that annealing at about 300° C. is required in the structure where an ITO is electrically connected with a metal such as Ti, Cr and Ta in order to reduce the contact resistance at the interface. However, this causes a decrease in the mobility of TFT. Further, the high line resistance hinders the achievement of a large-size TFT-LCD, high-definition and high-speed response.
One approach to this problem is to use Al for the SD to reduce the line resistance. In this structure, however, it is impossible to establish a direct contact between Al and n+a-Si and a direct contact between Al and an ITO. Thus, a direct contact between the SD and an ohmic contact film and a direct contact between the SD and a transparent pixel electrode cannot be established in this structure. To address this problem, Japanese Unexamined Patent Application Publication No. 2000-199912 discloses a method that configures the SD as a three-layer structure of MoCr/Al arroy/MoCr to reduce line resistance and establish a direct contact between the SD and an n+a-Si film in a lower layer and a direct contact between the SD and an ITO in a upper layer. In this method, however, it is necessary to deposit three layers for the SD, which complicates the production process.